The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2015

Filed:

Feb. 18, 2014
Applicant:

Panasonic Corporation, Osaka, JP;

Inventors:

Masashi Murakami, Kyoto, JP;

Makoto Ikuma, Kyoto, JP;

Yutaka Abe, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 3/14 (2006.01); H04N 5/335 (2011.01); H04N 5/378 (2011.01); H04N 5/359 (2011.01); H04N 5/365 (2011.01);
U.S. Cl.
CPC ...
H04N 5/335 (2013.01); H04N 5/378 (2013.01); H04N 5/3595 (2013.01); H04N 5/3658 (2013.01);
Abstract

A solid-state imaging device includes a plurality of pixel cells arranged in rows and columns, a plurality of vertical signal lines each of which is provided for a corresponding one of the columns, and a plurality of column circuits each of which is provided for a corresponding one or more of the columns and into each of which are input the signal voltages output to one or more of the vertical signal lines disposed in the corresponding one or more of the columns. Each of the plurality of column circuits includes an amplifier that includes a constant current source transistor, the solid-state imaging device further includes a reference current source circuit that supplies a first bias voltage to gates of a plurality of the constant current source transistors included in the column circuits, and each of the column circuits further includes a sample-and-hold circuit that holds the first bias voltage.


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