The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2015

Filed:

Apr. 18, 2013
Applicant:

Applied Micro Circuits Corporation, Sunnyvale, CA (US);

Inventors:

Yehuda Azenkot, San Jose, CA (US);

Timothy P. Walker, Boxford, MA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D 3/24 (2006.01); H04L 25/49 (2006.01); H04L 1/00 (2006.01); H03L 7/081 (2006.01); H04J 3/07 (2006.01);
U.S. Cl.
CPC ...
H04L 1/004 (2013.01); H03L 7/081 (2013.01); H04J 3/076 (2013.01);
Abstract

Systems and methods for smoothing jitter generated by byte stuffing. A frequency synthesizer comprises a smoothing logic coupled with a PLL. The smoothing logic is configured to modify a phase error signal generated by a phase frequency detector into a distributed phase error signal that spread over multiple clock cycles. The distributed phase error signal is used to drive a DCO. The smoothing logic may comprise a ramping logic operable to generate a series of ramping values to substitute a phase difference in the phase error signal. The phase difference may correspond to a stuffing byte.


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