The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2015

Filed:

Aug. 13, 2014
Applicant:

Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;

Inventors:

Kakeru Kimura, Tokyo, JP;

Yoshimi Iso, Tokyo, JP;

Masakazu Okamura, Tokyo, JP;

Masashi Nishimoto, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/20 (2006.01); H03M 1/18 (2006.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
H03M 1/20 (2013.01); H03M 1/182 (2013.01); H03M 1/183 (2013.01); H03M 1/124 (2013.01);
Abstract

The present invention provides a data processing system which can increase resolution and which has excellent tracking with respect to the switching of a conversion range and is small in conversion error. The data processing system, which obtains an A/D conversion result after an n (where n: positive integer)-bit extension made to the resolution of an A/D converter, divides the input range of the A/D converter by m (2≦m), determines to which divided range the A/D conversion result by the A/D converter belongs with respect to an analog signal to be measured, amplifies an amp offset which defines the range of the determined divided range as a voltage range for the input range of the A/D converter by applying the amp offset to a programmable gain amplifier, converts the amplified signal by the A/D converter, and adds a corresponding digital offset to a result of execution of a lower side bit extension to the conversion result and a division thereof by actually measured gain of the programmable gain amplifier, whereby an A/D conversion result with a bit precision being n-bit extended is obtained.


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