The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2015

Filed:

Sep. 30, 2014
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Brent A. Anderson, Jericho, VT (US);

Edward J. Nowak, Essex Junction, VT (US);

Yan Zhang, South Burlington, VT (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/772 (2006.01);
U.S. Cl.
CPC ...
H01L 29/772 (2013.01);
Abstract

Disclosed are gate-all-around (GAA) field effect transistors (FETs) and methods of forming them. In one GAAFET, a semiconductor body is on an insulator layer. A gate wraps around the semiconductor body (i.e., is adjacent to the top, bottom and opposing sides of the semiconductor body) at a channel region with a lower portion of the gate being in a cavity in the insulator layer. In another GAAFET, multiple semiconductor bodies are on an insulator layer. A gate wraps around and extends between the semiconductor bodies at channel regions with a lower portion of the gate being contained in a cavity in the insulator layer. To reduce gate resistance and gate-to-source/drain contact capacitance, the lower portion extends a greater distance below the bottom(s) of the semiconductor body(ies) than the upper portion extends above the top(s). To further reduce gate resistance, the length and width of the lower portion increases from the top surface of the insulator layer downward.


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