The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2015

Filed:

Mar. 04, 2014
Applicant:

Nec Corporation, Minato-ku, Tokyo, JP;

Inventor:

Hideaki Kobayashi, Tokyo, JP;

Assignee:

NEC CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/26 (2014.01); H01L 21/66 (2006.01); G01R 31/02 (2006.01);
U.S. Cl.
CPC ...
H01L 22/14 (2013.01); H01L 2924/0002 (2013.01); H01L 22/34 (2013.01);
Abstract

A method of manufacturing a semiconductor device according to the present invention includes, in a silicon substrate of the semiconductor chip, providing two TSVs (Through-Silicon-Vias) that are formed such that interfaces with the silicon substrate are covered with insulating films and bottom surface sides thereof do not penetrate through the silicon substrate, providing a high concentration impurity region in a peripheral region of the bottom surface sides of the TSVs in the silicon substrate, connecting a test circuit to the TSVs, inputting a test signal from one of the TSVs and detecting the test signal output via the high concentration impurity region and the other TSV, thereby evaluating a failure of the semiconductor chip, thinning a bottom surface of the semiconductor chip and removing the high concentration impurity region.


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