The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2015

Filed:

Aug. 15, 2013
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Bikas Maiti, Austin, TX (US);

Yew Keong Chong, New Braunfels, TX (US);

Martin Jay Kinkade, Austin, TX (US);

Assignee:

ARM Limited, Cambridge, GB;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
G11C 7/22 (2013.01);
Abstract

A memory device includes an array of memory cells arranged as a plurality of rows and columns, a plurality of word lines, each word line being coupled to an associated row of memory cells, and a plurality of bit lines, each bit line being coupled to an associated column of memory cells. Access circuitry is coupled to the word lines and the bit lines in order to perform access operations in respect of selected memory cells within the array. Control circuitry controls operation of the access circuitry and includes self-timed path (STP) delay circuitry. The control circuitry employs the delay indication when controlling the access circuitry to perform said access operations. Voltage supply control circuitry switches the voltage supply to at least one portion of the STP delay circuitry between a peripheral voltage supply and an array voltage supply dependent on a control signal.


Find Patent Forward Citations

Loading…