The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 23, 2015
Filed:
Dec. 14, 2012
Applicant:
Apple Inc., Cupertino, CA (US);
Inventors:
Saman Saeedi, Cupertino, CA (US);
Shafiq M. Jamal, Pleasanton, CA (US);
Ahmad Al-Dahle, Santa Clara, CA (US);
Assignee:
APPLE INC., Cupertino, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G09G 3/00 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3607 (2013.01); G09G 3/006 (2013.01); G09G 3/3655 (2013.01); G09G 2320/0204 (2013.01); G09G 2320/0219 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0247 (2013.01); G09G 2320/029 (2013.01); G09G 2320/0295 (2013.01); G09G 2320/041 (2013.01); G09G 2320/0626 (2013.01); G09G 2320/0693 (2013.01); G09G 2330/12 (2013.01);
Abstract
Systems, methods, and devices are provided to reduce or eliminate mura artifacts on electronic displays. For example, pixels may be programmed to a uniform gray level before all or a substantial number of gates of the pixels are activated. The voltages on some or all source lines that supply the pixels may be measured. A mura artifact may be seen when voltage differences on the source lines are present. As such, operational parameters of the electronic display may be adjusted to reduce or eliminate the mura artifact by reducing the voltage differences.