The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2015

Filed:

May. 19, 2014
Applicant:

At&t Intellectual Property I, L.p., Atlanta, GA (US);

Inventors:

William Taylor, Duluth, GA (US);

David Massengill, Covington, GA (US);

John Hollingsworth, Covinton, GA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 1/16 (2006.01); H04L 12/24 (2006.01); H04L 12/46 (2006.01); H04L 12/701 (2013.01); H04L 12/707 (2013.01); H04L 12/703 (2013.01); H04L 12/26 (2006.01); G06F 11/20 (2006.01); H04L 1/22 (2006.01);
U.S. Cl.
CPC ...
H04L 41/065 (2013.01); H04L 12/4641 (2013.01); H04L 45/00 (2013.01); H04L 45/22 (2013.01); H04L 45/28 (2013.01); H04L 43/0817 (2013.01); H04L 41/0659 (2013.01); G06F 11/2002 (2013.01); H04L 1/22 (2013.01); H04L 41/0672 (2013.01);
Abstract

An example involves when a first logical circuit identifier of the dedicated logical circuit that is to communicate data only between a host device and a remote device does not match a second logical circuit identifier of a logical failover circuit comprising an alternate communication path for communicating the data, and when the dedicated logical circuit has failed: the second logical circuit identifier is renamed to identify the logical failover circuit using the first logical circuit identifier when the logical failover circuit is a dedicated logical failover circuit to communicate only when the dedicated logical circuit fails, and the dedicated logical circuit is renamed to identify the dedicated logical circuit using the second logical circuit identifier when the logical failover circuit is to communicate regardless of failure of the dedicated logical circuit.


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