The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 16, 2015
Filed:
Jun. 17, 2014
Realtek Semiconductor Corp., HsinChu, TW;
Hong-Ta Hsu, Hsinchu, TW;
Realtek Semiconductor Corp., Science Park, HsinChu, TW;
Abstract
A method for estimating a sampling delay error between a first analog-to-digital converter (ADC) and a second ADC in a time-interleaved ADC includes: receiving a first digital output signal and a second digital output signal generated from the first ADC and the second ADC based on a same analog input signal, respectively; determining a delay amount according to a predetermined sampling delay between the first ADC and the second ADC and a delay adjusting value, and applying the delay amount delay to the second digital output signal to generate a delayed digital output signal, wherein the delay adjusting value Td is used to estimate the sampling delay error Te; calculating a difference between the first digital output signal and the delayed digital output signal; and feeding back the difference for adjusting the delay adjusting value Td according to the difference.