The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2015

Filed:

Mar. 21, 2013
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Christos D. Dimitrakopoulos, Baldwin Place, NY (US);

Jeehwan Kim, White Plains, NY (US);

Hongsik Park, Yorktown Heights, NY (US);

Byungha Shin, White Plains, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/16 (2006.01); H01L 29/32 (2006.01); C30B 29/36 (2006.01); C30B 33/06 (2006.01); C30B 25/18 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0673 (2013.01); H01L 29/1606 (2013.01); H01L 29/1608 (2013.01); H01L 29/32 (2013.01); C30B 29/36 (2013.01); C30B 33/06 (2013.01); C30B 25/18 (2013.01);
Abstract

A method for forming nanostructures includes bonding a flexible substrate to a crystalline semiconductor layer having a two-dimensional material formed on a side opposite the flexible substrate. The crystalline semiconductor layer is stressed in a first direction to initiate first cracks in the crystalline semiconductor layer. The first cracks are propagated through the crystalline semiconductor layer and through the two-dimensional material. The stress of the crystalline semiconductor layer is released to provide parallel structures including the two-dimensional material on the crystalline semiconductor layer.


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