The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2015

Filed:

Jun. 01, 2012
Applicants:

Ryan James Goss, Prior Lake, MN (US);

David Scott Seekins, Shakopee, MN (US);

Mark Allen Gaertner, Vadnais Heights, MN (US);

Inventors:

Ryan James Goss, Prior Lake, MN (US);

David Scott Seekins, Shakopee, MN (US);

Mark Allen Gaertner, Vadnais Heights, MN (US);

Assignee:

SEAGATE TECHNOLOGY LLC, Cupertino, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/08 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0871 (2013.01); G06F 2212/222 (2013.01); G06F 2212/502 (2013.01); G06F 2212/217 (2013.01);
Abstract

A tiered memory system includes a memory controller for a primary memory and a secondary memory, where the secondary memory is used as a cache for the primary memory. The memory controller is configured to cause redundant data that is stored in the primary memory of the memory system to be stored in first memory locations of the secondary memory. The controller causes data that is not stored in the primary memory to be stored in second memory locations of the secondary memory. The second memory locations have at least one of lower bit error rate and higher access speed than the first memory locations.


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