The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2015

Filed:

Mar. 07, 2013
Applicant:

Kabushiki Kaisha Toshiba, Minato-ku, Tokyo, JP;

Inventors:

Hansen Teong, Tokyo, JP;

Masayoshi Takahashi, Kanagawa-ken, JP;

Hirokazu Kadowaki, Kanagawa-ken, JP;

Masatoshi Watanabe, Kanagawa-ken, JP;

Kenji Kanamaru, Kanagawa-ken, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 3/156 (2006.01); G05F 1/46 (2006.01); G05F 1/565 (2006.01); G05F 1/575 (2006.01);
U.S. Cl.
CPC ...
G05F 1/46 (2013.01); G05F 1/565 (2013.01); G05F 1/575 (2013.01);
Abstract

According to an embodiment, a voltage regulator having an output transistor, a voltage dividing circuit, an error amplifier, a detection circuit and a phase compensation capacitance circuit is provided. The output transistor has one end to which a power supply voltage is supplied, a control terminal to which a control signal is input, and the other end which outputs an output voltage. The voltage dividing circuit is connected between the other end of the output transistor and a first reference voltage. The error amplifier is configured to output the control signal according to the difference between a divided voltage and a second reference voltage. The detection circuit is configured to detect an operation environment. The phase compensation capacitance circuit is configured to adjust a phase compensation capacitance between the other end of the output transistor and an input terminal of the error amplifier, in accordance with the detected operation environment.


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