The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2015

Filed:

Sep. 12, 2013
Applicant:

Fujitsu Semiconductor Limited, Yokohama-shi, Kanagawa, JP;

Inventors:

Ian Juso Dedic, Middlesex, GB;

Saul Darzy, Middlesex, GB;

Gavin Lambertus Allen, Western Australia, AU;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01);
U.S. Cl.
CPC ...
H03M 1/1023 (2013.01); H03M 1/10 (2013.01); H03M 1/1009 (2013.01);
Abstract

A method of calibrating switching circuitry, the switching circuitry comprising a measurement node and a plurality of output switches connected to the measurement node, and the circuitry being configured, in each clock cycle of a series of clock cycles, to control whether or not one or more of said output switches carry a given current based upon input data, the method comprising: inputting a plurality of different data sequences to the circuitry, each sequence causing a given pattern of voltages to occur at the measurement node as a result of currents passing through the output switches; measuring the voltages occurring at the measurement node for each said sequence; and calibrating the switching circuitry in dependence upon a result of said measuring.


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