The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 09, 2015
Filed:
Oct. 30, 2013
Applicant:
Novachips Canada Inc., Ottawa, CA;
Inventor:
Hong Beom Pyeon, Ottawa, CA;
Assignee:
NovaChips Canada Inc., Ottawa, Ontario, CA;
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); G11C 8/00 (2006.01); H03L 7/10 (2006.01); H03L 7/22 (2006.01); G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
H03L 7/10 (2013.01); H03L 7/22 (2013.01); G11C 7/222 (2013.01);
Abstract
A method, system and apparatus to provide a solution of PLL locking issue in the daisy chained memory system. A first embodiment uses consecutive PLL on based on locking status of backward device on the daisy chained memory system with no requirement of PLL locking status checking pin. A second embodiment uses Flow through PLL control with a locking status pin either using an existing pin or a separated pin. A third embodiment uses a relocking control mechanism to detect PLL relocking from the device. A fourth variation uses flag signal generation to send to the controller.