The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2015

Filed:

Feb. 27, 2013
Applicant:

Seiko Instruments Inc., Chiba, JP;

Inventors:

Masaya Murata, Chiba, JP;

Tomohiro Oka, Chiba, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/12 (2006.01); G11C 5/14 (2006.01); G11C 8/08 (2006.01); G11C 16/30 (2006.01); H02M 3/07 (2006.01); H02M 1/36 (2007.01);
U.S. Cl.
CPC ...
H03K 5/12 (2013.01); G11C 5/145 (2013.01); G11C 8/08 (2013.01); G11C 16/30 (2013.01); H02M 3/07 (2013.01); H02M 1/36 (2013.01);
Abstract

A boosting circuit is provided which performs an appropriate boosting operation in accordance with load capacitance. In the boosting circuit, a slope control circuit is provided between a limiter circuit, which limits a high voltage obtained by a charge pump circuit to a desired boosted voltage VPP, and a discharge circuit, which makes the boosted voltage VPP drop quickly to a power supply voltage VCC after the completion of writing, to enable a boosting operation in an appropriate boosted-voltage reach time, by increasing the time taken to reach the boosted voltage VPP in the case where the load capacitance is low, while keeping the time taken to reach the boosted voltage VPP unchanged, irrespective of the presence/absence of the slope control circuit, in the case where the load capacitance is high as in the case of selecting the memory cells collectively.


Find Patent Forward Citations

Loading…