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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9054174 B1

PDFFull Text
Date of Patent:
Jun. 09, 2015

Filed:

Jun. 07, 2013

Semiconductor device and method for producing the same

Applicant:

Hitachi, Ltd., Chiyoda-ku, Tokyo, JP;

Inventors:

Digh Hisamoto, Kokubunji, JP;

Naoki Tega, Kiyose, JP;

Kumiko Konishi, Kokubunji, JP;

Hiroyuki Matsushima, Kokubunji, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:

Miles & Stockbridge P.C.

Primary Examiner:

Fei Fei Yeung Lopez

Int. Cl.
CPC ...
H01L 29/12 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/739 (2006.01); H01L 29/16 (2006.01); H01L 29/872 (2006.01); H01L 21/04 (2006.01); H01L 29/417 (2006.01); H01L 29/47 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78 (2013.01); H01L 29/66477 (2013.01); H01L 29/1608 (2013.01); H01L 29/665 (2013.01); H01L 29/872 (2013.01); H01L 21/0495 (2013.01); H01L 29/41766 (2013.01); H01L 29/41775 (2013.01); H01L 29/47 (2013.01); H01L 29/495 (2013.01); H01L 29/517 (2013.01); H01L 29/66068 (2013.01); H01L 29/7395 (2013.01); H01L 29/7802 (2013.01); H01L 29/7811 (2013.01); H01L 29/7813 (2013.01); H01L 29/782 (2013.01); H01L 29/7839 (2013.01); H01L 29/0619 (2013.01);
Abstract

In a MOSFET using a SiC substrate, a source region having low resistance and high injection efficiency is formed without performing a high-temperature heat treatment. A vertical Schottky barrier transistor in which a source region SR on a SiC epitaxial substrate is constituted by a metal material is formed. The source region SR composed of a metal material can be brought into a low resistance state without performing a high-temperature activation treatment. Further, by segregating a conductive impurity DP at an interface between the source region SR composed of a metal material and the SiC epitaxial substrate, the Schottky barrier height can be reduced, and the carrier injection efficiency from the source region SR can be improved.

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