The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2015

Filed:

Apr. 05, 2013
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Kok Chai Goh, Melaka, MY;

Meng Tong Ong, Melaka, MY;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/34 (2006.01); H01L 21/78 (2006.01); H01L 23/31 (2006.01); H01L 23/36 (2006.01); H01L 23/492 (2006.01); H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01L 23/34 (2013.01); H01L 21/78 (2013.01); H01L 2224/73253 (2013.01); H01L 23/3185 (2013.01); H01L 23/36 (2013.01); H01L 23/492 (2013.01); H01L 2924/13091 (2013.01); H01L 21/6835 (2013.01); H01L 21/6836 (2013.01); H01L 2221/68327 (2013.01); H01L 2221/6834 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/1305 (2013.01); H01L 2924/13062 (2013.01);
Abstract

A semiconductor package includes a single semiconductor die and an electrically and thermally conductive base. The single semiconductor die includes a semiconductor body having opposing first and second surfaces and insulated sides between the first and second surfaces. The single semiconductor die further includes a first electrode at the first surface and a second electrode at the second surface. The single semiconductor die has a defined thickness measured between the first and second surfaces, a defined width measured along one of the insulated sides, and a defined length measured along another one of the insulated sides. The base is attached to the second electrode at the second surface of the single semiconductor die and has the same length and width as the single semiconductor die.


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