The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2015

Filed:

Oct. 12, 2012
Applicants:

Xiaolong MA, Beijing, CN;

Huaxiang Yin, Beijing, CN;

Sen Xu, Beijing, CN;

Huilong Zhu, Poughkeepsie, NY (US);

Inventors:

Xiaolong Ma, Beijing, CN;

Huaxiang Yin, Beijing, CN;

Sen Xu, Beijing, CN;

Huilong Zhu, Poughkeepsie, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/84 (2006.01); H01L 29/15 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/10 (2006.01); B82Y 10/00 (2011.01); H01L 29/51 (2006.01); H01L 29/165 (2006.01);
U.S. Cl.
CPC ...
H01L 29/15 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/517 (2013.01); H01L 29/7853 (2013.01); H01L 29/1054 (2013.01); H01L 29/151 (2013.01); H01L 29/165 (2013.01); B82Y 10/00 (2013.01);
Abstract

The present invention discloses a method for manufacturing a semiconductor device, which comprises: forming a plurality of fins on a substrate, which extend along a first direction and have rhombus-like cross-sections; forming a gate stack structure on each fin, which traverses the plurality of fins and extends along a second direction; wherein a portion in each fin that is under the gate stack structure forms a channel region of the device, and portions in each fin that are at both sides of the gate stack structure along the first direction form source and drain regions. The semiconductor device and its manufacturing method according to the present invention use rhombus-like fins to improve the gate control capability to effectively suppress the short channel effect, moreover, an epitaxial quantum well is used therein to better limit the carriers, thus improving the device drive capability.


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