The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2015

Filed:

Jun. 06, 2011
Applicant:

Hiroki Higashiyama, Osaka, JP;

Inventor:

Hiroki Higashiyama, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01Q 1/36 (2006.01); G06K 19/077 (2006.01); H01Q 1/38 (2006.01); H01Q 1/22 (2006.01); H01Q 7/00 (2006.01); H05K 3/46 (2006.01);
U.S. Cl.
CPC ...
G06K 19/07775 (2013.01); G06K 19/07718 (2013.01); G06K 19/07773 (2013.01); H05K 3/4685 (2013.01); H01Q 1/38 (2013.01); H01Q 1/2225 (2013.01); H01Q 7/00 (2013.01); G06K 19/07783 (2013.01);
Abstract

Provided are an antenna circuit constituent body for an IC card/tag capable of reducing environmental load in a manufacturing process for joining both end portions of an antenna circuit pattern layer and capable of enhancing reliability of joined portions of the both end portions of the antenna circuit pattern layer: and a method for manufacturing the antenna circuit constituent body for an IC card/tag. In the antenna circuit constituent body for an IC card/tag, an insulating layer () is formed so as to extend from an upper part of a first circuit pattern layer part (), via an upper part of a third circuit pattern layer part (), and to an upper part of a second circuit pattern layer part (). A conductive layer () is formed on the insulating layer () so as to bring the first circuit pattern layer part () and the second circuit pattern layer part () into conduction. The insulating layer () has a plurality of inclined end surfaces on each of the first circuit pattern layer part () and the second circuit pattern layer part ().


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