The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 09, 2015
Filed:
Dec. 14, 2012
Applicant:
Altera Corporation, San Jose, CA (US);
Inventors:
Muhammad Ahmed, Hayward, CA (US);
Manoj Reghunath, Austin, TX (US);
Assignee:
Altera Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/36 (2006.01); G06F 11/27 (2006.01);
U.S. Cl.
CPC ...
G06F 11/3648 (2013.01); G06F 11/27 (2013.01); G06F 11/3664 (2013.01);
Abstract
A field programmable gate array (FPGA) includes a soft processor and a soft processor debug unit implemented by programmable logic on the FPGA. The FPGA includes a system on a chip (SOC) that includes a hard processor and a hard processor debug unit. The FPGA includes a bus bridge, coupled to an input output (IO) of the FPGA, operable to transmit data between the IO and the soft processor debug unit and the hard processor debug unit.