The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2015

Filed:

Jan. 22, 2013
Applicant:

Marvell World Trade Ltd., St. Michael, BB;

Inventors:

Shailesh Shiwalkar, Santa Clara, CA (US);

Hy Dinh Vu, Milpitas, CA (US);

Jagadish K. Mukku, Sunnyvale, CA (US);

Sandeep Karmarkar, Pune, IN;

Anil Goyal, San Ramon, CA (US);

Assignee:

MARVELL WORLD TRADE LTD., St. Michael, BB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/02 (2006.01); G06F 12/08 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 12/0895 (2013.01);
Abstract

A cache system for a storage device includes (i) one or more solid state drives (SSDs), (ii) one or more random access memories (RAMs), and (iii) a cache control device. The cache control device caches at least some of first data that is to be written to the storage device, and caches at least some of second data that is retrieved from the storage device. When caching first data or second data in one of the one or more RAMs, the cache control device writes to the one RAM non-sequentially with respect to a memory space of the one RAM. When caching first data or second data in one of the one or more SSDs, the cache control device writes to the one SSD sequentially with respect to a memory space of the one SSD.


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