The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2015

Filed:

Sep. 12, 2012
Applicants:

Malcolm S. Allen-ware, Austin, TX (US);

Alan J. Drake, Round Rock, TX (US);

Wei Huang, Austin, TX (US);

Michael S. Floyd, Cedar Park, TX (US);

Huajun Wen, Austin, TX (US);

Inventors:

Malcolm S. Allen-Ware, Austin, TX (US);

Alan J. Drake, Round Rock, TX (US);

Wei Huang, Austin, TX (US);

Michael S. Floyd, Cedar Park, TX (US);

Huajun Wen, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3296 (2013.01); G06F 1/3203 (2013.01); Y02B 60/1217 (2013.01); Y02B 60/1285 (2013.01);
Abstract

A mechanism is provided for minimizing power consumption for operation of a fixed-frequency processing unit. A number of timeslots are counted in a time window where throttling is engaged to the fixed-frequency processing unit. The number of timeslots where throttling is engaged is divided by a total number of timeslots within the time window, thereby producing a performance loss (PLOSS) value. A determination is made as to whether determining whether the (PLOSS) value associated with the fixed-frequency processing unit is greater than an allowed performance loss (APLOSS) value. Responsive to the PLOSS value being less than or equal to the APLOSS value, a decrease in voltage supplied to the fixed-frequency processing unit is initiated.


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