The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2015

Filed:

Jun. 05, 2014
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventor:

Patrick J. Quinn, Dublin, IE;

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01); H03M 1/46 (2006.01); H03M 1/12 (2006.01); H03M 1/38 (2006.01);
U.S. Cl.
CPC ...
H03M 1/46 (2013.01); H03M 1/12 (2013.01); H03M 1/38 (2013.01);
Abstract

An apparatus relating generally to an analog-to-digital converter ('ADC') is disclosed. In such an apparatus, the ADC is configured for successive approximations. The ADC includes a digital-to-analog converter ('DAC'), a comparator, and a control block. The DAC is coupled to receive a reference input signal and coupled to provide an analog output signal. The analog output signal is capacitively coupled to an analog input node through a capacitor. The capacitor is coupled between the DAC and the comparator to provide capacitive coupling therebetween. The comparator is coupled to the analog input node. The comparator is further coupled to provide a comparator output signal to the control block. The control block is configured for successive approximations to provide a digital output signal to a digital output node. The DAC is coupled to the digital output node to receive the digital output signal as a feedback input signal.


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