The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2015
Filed:
Jun. 05, 2013
Jung-ik OH, Seongnam-Si, KR;
Dae-hyun Jang, Seongnam-Si, KR;
Seong-soo Lee, Seongnam-Si, KR;
Han-na Cho, Incheon, KR;
Jung-Ik Oh, Seongnam-Si, KR;
Dae-Hyun Jang, Seongnam-Si, KR;
Seong-Soo Lee, Seongnam-Si, KR;
Han-Na Cho, Incheon, KR;
SAMSUNG ELECTRONICS CO., LTD., Suwon-Si, Gyeonggi-Do, KR;
Abstract
A method of forming a multi-floor step pattern structure includes forming a stacked structure having alternating insulating interlayers and sacrificial layers on a substrate. A first photoresist pattern is formed on the stacked structure. A first preliminary step pattern structure is formed by etching portions of the stacked structure using the first photoresist pattern as an etching mask. A passivation layer pattern is formed on upper surfaces of the first photoresist pattern and the first preliminary step pattern structure. A second photoresist pattern is formed by removing a side wall portion of the first photoresist pattern exposed by the passivation layer pattern. A second preliminary step pattern structure is formed by etching exposed insulating interlayers and underlying sacrificial layers using the second photoresist pattern as an etching mask. The above steps may be repeated on the second preliminary step pattern structure to form the multi-floor step pattern structure.