The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2015
Filed:
Mar. 13, 2013
Applicants:
Radu M. Secareanu, Phoenix, AZ (US);
Suman K. Banerjee, Tucson, AZ (US);
Olin L. Hartin, Phoenix, AZ (US);
Inventors:
Radu M. Secareanu, Phoenix, AZ (US);
Suman K. Banerjee, Tucson, AZ (US);
Olin L. Hartin, Phoenix, AZ (US);
Assignee:
FREESCALE SEMICONDUCTOR INC., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01L 23/552 (2006.01); H01L 29/06 (2006.01); H01L 21/761 (2006.01); H01L 21/762 (2006.01); H01L 21/765 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0649 (2013.01); H01L 21/761 (2013.01); H01L 21/762 (2013.01); H01L 21/765 (2013.01); H01L 21/823481 (2013.01); H01L 29/0619 (2013.01);
Abstract
An integrated circuit includes a p-well block region having a low doping concentration formed in a region of a substrate for providing noise isolation between a first circuit block and a second circuit block. The integrated circuit further includes a guard region and a grounded, highly doped region for providing additional noise isolation.