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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9048103 B1

PDFFull Text
Date of Patent:
Jun. 02, 2015

Filed:

Jun. 26, 2006

Method for producing semiconductor device

Applicants:

Yoshio Shimoida, Yokosuka, JP;

Hideaki Tanaka, Yokohama, JP;

Tetsuya Hayashi, Yokosuka, JP;

Masakatsu Hoshi, Yokohama, JP;

Shigeharu Yamagami, Yokohama, JP;

Noriaki Kawamoto, Kyoto, JP;

Takayuki Kitou, Kameoka, JP;

Mineo Miura, Kyoto, JP;

Takashi Nakamura, Nagaokakyo, JP;

Inventors:

Yoshio Shimoida, Yokosuka, JP;

Hideaki Tanaka, Yokohama, JP;

Tetsuya Hayashi, Yokosuka, JP;

Masakatsu Hoshi, Yokohama, JP;

Shigeharu Yamagami, Yokohama, JP;

Noriaki Kawamoto, Kyoto, JP;

Takayuki Kitou, Kameoka, JP;

Mineo Miura, Kyoto, JP;

Takashi Nakamura, Nagaokakyo, JP;

Assignees:

NISSAN MOTOR CO., LTD., Kanagawa-Ken, JP;

ROHM CO., LTD., Kyoto-Fu, JP;

Attorney:

McDermott Will & Emery LLP

Primary Examiner:

Earl Taylor

Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/3105 (2006.01); H01L 29/78 (2006.01); H01L 21/04 (2006.01); H01L 29/267 (2006.01); H01L 29/66 (2006.01); H01L 29/16 (2006.01); H01L 29/772 (2006.01);
U.S. Cl.
CPC ...
H01L 21/049 (2013.01); H01L 29/1608 (2013.01); H01L 29/267 (2013.01); H01L 29/66068 (2013.01); H01L 29/772 (2013.01); H01L 29/7828 (2013.01);
Abstract

A method for producing a semiconductor device () is disclosed. The semiconductor device () includes: 1) a semiconductor substrate (), 2) a hetero semiconductor area () configured to contact a first main face (A) of the semiconductor substrate () and different from the semiconductor substrate () in band gap, 3) a gate electrode () contacting, via a gate insulating film (), a part of a junction part () between the hetero semiconductor area () and the semiconductor substrate (), 4) a source electrode () configured to connect to the hetero semiconductor area (), and 5) a drain electrode () configured to make an ohmic connection with the semiconductor substrate (). The method includes the following sequential operations: i) forming the gate insulating film (); and ii) nitriding the gate insulating film ().

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