The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2015
Filed:
Mar. 14, 2013
Applicant:
Xilinx, Inc., San Jose, CA (US);
Inventor:
Vassili Kireev, San Jose, CA (US);
Assignee:
XILINX, INC., San Jose, CA (US);
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01F 17/00 (2006.01); H01F 41/04 (2006.01); H03F 3/04 (2006.01); H01L 23/522 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01F 17/0013 (2013.01); H01F 41/041 (2013.01); H03F 3/04 (2013.01); Y10T 29/4902 (2013.01); H01L 23/5227 (2013.01); H01L 28/10 (2013.01); H01L 2924/3011 (2013.01); H01L 2924/0002 (2013.01);
Abstract
A circuit for implementing a gain stage in an integrated circuit is described. The circuit comprises a first inductor formed in a first plurality of metal layers; a second inductor formed in a second plurality of metal layers, the second inductor coupled to a center tap of the first inductor; and wherein the second inductor has a diameter that is less than a diameter of the first inductor. A method of implementing a gain stage in an integrated circuit is also described.