The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9047979 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 02, 2015

Filed:

Jul. 15, 2014
Applicant:

Ps4 Luxco S.a.r.l., Luxembourg, LU;

Inventor:

Homare Sato, Tokyo, JP;

Assignee:

PS4 Luxco S.a.r.l., Luxembourg, LU;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01); G11C 11/408 (2006.01); G11C 5/02 (2006.01); H01L 23/48 (2006.01); G11C 11/4063 (2006.01); G06F 12/02 (2006.01); G06F 12/08 (2006.01); H01L 25/18 (2006.01); G11C 5/04 (2006.01); G11C 8/12 (2006.01);
U.S. Cl.
CPC ...
G11C 11/408 (2013.01); G11C 5/02 (2013.01); H01L 23/481 (2013.01); H01L 25/18 (2013.01); H01L 2224/16145 (2013.01); G11C 11/4063 (2013.01); G06F 12/0207 (2013.01); G06F 12/0223 (2013.01); G06F 12/08 (2013.01); G11C 5/04 (2013.01); G11C 8/12 (2013.01);
Abstract

A method for accessing a plurality of DRAM devices each having a plurality of banks, includes determining an operating mode for the plurality of DRAM devices, providing a chip selection address and a bank address with an active command to activate a first bank in a first one of the plurality of DRAM devices and, while the first bank in the first one of the plurality of DRAM devices is activated, one or more first banks in remaining DRAM devices of the plurality of DRAM devices are: not activated if the operating mode is determined to be a logical rank address mode, and possibly activated if the operating mode is determined to be a physical rank address mode, and subsequently providing at least a bank address with a column command to access the first bank in the first one of the plurality of DRAM devices.


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