The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2015

Filed:

Aug. 07, 2012
Applicants:

Sudeep Ravi Kottilingal, San Diego, CA (US);

Ramesh Ramaswamy, San Diego, CA (US);

Suhail Jalil, San Diego, CA (US);

Azzedine Touzni, San Diego, CA (US);

Inventors:

Sudeep Ravi Kottilingal, San Diego, CA (US);

Ramesh Ramaswamy, San Diego, CA (US);

Suhail Jalil, San Diego, CA (US);

Azzedine Touzni, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01); G06F 12/10 (2006.01); G06F 12/02 (2006.01); G06F 12/08 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3296 (2013.01); G06F 12/1027 (2013.01); G06F 12/0292 (2013.01); G06F 12/08 (2013.01); G06F 12/10 (2013.01); G06F 2212/205 (2013.01); Y02B 60/1225 (2013.01);
Abstract

In the various aspects, virtualization techniques may be used to improve performance and reduce the amount of power consumed by translating virtual memory addresses into physical addresses on a computing system having hybrid memory. In a first stage of memory translation, an operating system translates virtual addresses to intermediate physical addresses. In a second stage of memory translation, a chip or virtualization software translates the intermediate physical address to physical addresses based on the characteristics of the physical memory and the characteristics of the processes associated with the physical memory.


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