The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2015

Filed:

Mar. 17, 2014
Applicant:

Alfred E. Mann Foundation for Scientific Research, Santa Clarita, CA (US);

Inventor:

Edward K. F. Lee, Fullerton, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/12 (2006.01); A61N 1/36 (2006.01); A61N 1/372 (2006.01); H03M 1/80 (2006.01); H03M 1/00 (2006.01); H03M 1/46 (2006.01); H03M 1/68 (2006.01);
U.S. Cl.
CPC ...
A61N 1/36125 (2013.01); A61N 1/37235 (2013.01); A61N 1/36071 (2013.01); H03M 1/804 (2013.01); H03M 1/12 (2013.01); H03M 1/00 (2013.01); H03M 1/129 (2013.01); H03M 1/468 (2013.01); H03M 1/685 (2013.01);
Abstract

A successive approximation ADC made of a low voltage configurable differential amplifier and low voltage logic circuits which can convert a high voltage analog input to a digital equivalent. The differential amplifier can be configured as either an op amp or a comparator depending upon the mode of operation. An input capacitor Cis switchably coupled to an electrode selected for voltage sampling. A switched capacitor array Cis coupled across the differential amplifier input and output. A SAR coupled to the switched capacitor array provides a digital output corresponding to the sampled analog voltage. During a sampling interval and a charge transfer interval, the differential amplifier is configured as an op amp. During the transfer interval, the voltage on the input capacitor multiplied by the ratio C/Cis transferred to the switched capacitor array. During an analog to digital conversion interval, the ADC converts the analog voltage to an equivalent digital output.


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