The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2015

Filed:

Dec. 09, 2013
Applicant:

Skyworks Solutions, Inc., Woburn, MA (US);

Inventors:

Hua Wang, High Point, NC (US);

David Steven Ripley, Marion, IA (US);

Bryan J. Roll, Marion, IA (US);

Assignee:

Skyworks Solutions, Inc., Woburn, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/16 (2006.01); H03L 7/18 (2006.01); H03L 7/099 (2006.01); H03L 7/10 (2006.01); H03L 7/187 (2006.01); H03L 7/193 (2006.01);
U.S. Cl.
CPC ...
H03L 7/18 (2013.01); H03L 7/099 (2013.01); H03L 7/10 (2013.01); H03L 7/187 (2013.01); H03L 7/193 (2013.01);
Abstract

Apparatus and methods for tuning a voltage controlled oscillator (VCO) are provided. In one aspect, a method of auto-tuning in a phase-locked loop includes generating a VCO clock signal using a VCO coupled to a capacitor array, dividing the VCO clock signal to generate a divided clock signal using a prescaler circuit having a selectable division ratio, controlling a value of the selectable division ratio using a first counter and a second counter of a counter module, generating a phase-frequency detector feedback signal based on a division control signal M and the divided clock signal using the counter module, counting a number of cycles of the divided clock signal that occur during a calibration interval using a cycle counter of a digital processing logic circuit, and determining the value of a capacitor array control signal based on the number of cycles counted during the calibration interval.


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