The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 26, 2015
Filed:
Apr. 18, 2012
Applicants:
Byung-hyun Lee, Seongnam-si, KR;
Hoon Lee, Seongnam-si, KR;
Inventors:
Byung-Hyun Lee, Seongnam-si, KR;
Hoon Lee, Seongnam-si, KR;
Assignee:
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/525 (2006.01); G11C 29/00 (2006.01); H01L 21/66 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); G11C 5/04 (2006.01); H01L 25/18 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5252 (2013.01); H01L 23/481 (2013.01); H01L 23/5256 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 2224/13009 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/32146 (2013.01); G11C 29/883 (2013.01); G11C 5/04 (2013.01); H01L 22/22 (2013.01); H01L 24/32 (2013.01); H01L 24/94 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 2224/05009 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/94 (2013.01); H01L 2924/01005 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/014 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/1436 (2013.01); H01L 2924/1437 (2013.01); H01L 2924/1441 (2013.01); H01L 2924/1443 (2013.01); H01L 2924/14511 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06565 (2013.01); H01L 2924/1301 (2013.01);
Abstract
A multi-chip package is provided. The multi-chip package includes a plurality of chips including at least one bad chip and at least one good chip that are stacked and a plurality of through electrodes each penetrating the chips. A logic circuit included in the at least one bad chip is isolated from each of the plurality of through electrodes.