The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2015

Filed:

May. 27, 2014
Applicant:

Yokowo Co., Ltd., Tokyo, JP;

Inventors:

Shoichi Koshikawa, Tokyo, JP;

Junichiro Nikaido, Chuo, JP;

Shintaro Takase, Sagamihara, JP;

Yoshio Aoki, Kawasaki, JP;

Assignee:

YOKOWO CO., LTD., Tokyo, JP;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/34 (2006.01); H01L 29/06 (2006.01); H01L 23/055 (2006.01); H01L 23/10 (2006.01);
U.S. Cl.
CPC ...
H01L 23/055 (2013.01); H01L 23/10 (2013.01);
Abstract

A semiconductor packaging container allowing to use in millimeter band is provided at a low cost. The inner SIG pads and the inner GND pads, capable of a direct connection with a signal terminal of a semiconductor chipare provided on the bottomed cylindrical dielectric case formed of the liquid crystal polymer. Further, the external SIG pads integrally formed with the inner SIG padsand the external GND padintegrally formed with the inner GND pad are provided on the back of the bottom surface of the dielectric case as the external terminal. The inner GND pads and are to form the coplanar waveguide with the inner SIG pads and. Also, the inner GND pads and are to add capacitive reactance for canceling the inductance caused by the space at the semiconductor chip portion to the coplanar waveguide.


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