The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2015

Filed:

Mar. 13, 2013
Applicant:

Ansaldo Sts Usa, Inc., Pittsburgh, PA (US);

Inventors:

Mark John Gruber, Pittsburgh, PA (US);

Michael James Beacham, Pittsburgh, PA (US);

Assignee:

Ansaldo STS USA, Inc., Pittsburgh, PA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
B61L 5/00 (2006.01); B61L 27/04 (2006.01); B61L 27/00 (2006.01); B61L 1/18 (2006.01); B61L 3/22 (2006.01);
U.S. Cl.
CPC ...
B61L 27/04 (2013.01); B61L 1/18 (2013.01); B61L 3/221 (2013.01); B61L 27/0088 (2013.01);
Abstract

A sequential monitoring system is for an interlocking logic system and a track circuit system including a plurality of track circuits. The sequential monitoring system includes an interface between the interlocking logic system and the track circuit system; and a processor structured to monitor a state of each of the track circuits, validate a sequence of state changes of the track circuits, and interrupt and correct invalid track circuit state indications between the track circuit system and the interlocking logic system. The interface normally passes inputs from the track circuit system to outputs to the interlocking logic system. When an out of sequence event occurs, the processor applies a quarantine to a minimum of three of the track circuits in a quarantined area, thereby inhibiting use of an unoccupied track circuit in the quarantined area.


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