logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9037806 B1

PDFFull Text
Date of Patent:
May. 19, 2015

Filed:

Mar. 08, 2013

Reducing store operation busy times

Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Deanna Postles Dunn Berger, Poughkeepsie, NY (US);

Michael F. Fee, Cold Spring, NY (US);

Christine C. Jones, Poughkeepsie, NY (US);

Arthur J. O'Neill, Poughkeepsie, NY (US);

Diane L. Orf, Somerville, MA (US);

Assignee:

International Business Machines Corporation, Armonk, NY (US);

Attorneys:

Cantor Colburn LLP

Margaret McNamara

Primary Examiner:

Ryan Bertram

Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01); G06F 12/08 (2006.01); G06F 9/38 (2006.01); G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0806 (2013.01); G11C 2207/229 (2013.01); G06F 9/3855 (2013.01); G11C 7/22 (2013.01); G06F 12/0855 (2013.01); G06F 9/38 (2013.01);
Abstract

A computer product for reducing store operation busy times is provided. The computer product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes associating first and second platform registers with a cache array, determining that first and second store operations target a same wordline of the cache array, loading control information and data of the first and second store operation into the first and second platform registers and delaying a commit of the first store operation until the loading of the second platform register is complete. The method further includes committing the data from the first and second platform registers using the control information from the first and second platform registers to the wordline of the cache array at a same time to thereby reduce a busy time of the wordline of the cache array.

Find Patent Forward Citations

Berger, Deanna Postles Dunn. (2015). Reducing store operation busy times (U.S. Patent No. 9037806). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9037806

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…