The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2015

Filed:

Oct. 14, 2014
Applicant:

Quantum Semiconductor Llc, San Jose, CA (US);

Inventor:

Carlos J. R. P. Augusto, San Jose, CA (US);

Assignee:

QUANTUM SEMICONDUCTOR LLC, San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02B 6/12 (2006.01); G02B 6/122 (2006.01);
U.S. Cl.
CPC ...
G02B 6/1225 (2013.01); G02B 2006/12166 (2013.01); G02B 2006/12176 (2013.01);
Abstract

Light guiding structures are provided to improve the light coupling between photonic active devices and the top of a metallization layer stack interconnecting these photonic active devices. Each light guiding structure comprises a hole extending between the near surface of the photonic active devices and the top surface of the metallization layer stack, said hole being filled with dielectrics or a combination of dielectrics and metals. Such a light guiding structure removes from the optical path of light rays, the interfaces between the metallization layers, thereby confining light laterally and enabling interconnects with increased thickness and more levels of metal. This results in the suppression of multiple reflections and optical crosstalk. The light guiding structures can have cross-section diagonals with sub-wavelength dimensions can be fabricated after all CMOS process steps, thus having minimal interference and maximal compatibility with CMOS processing.


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