The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2015

Filed:

Jan. 11, 2013
Applicant:

Korea Advanced Institute of Science and Technology, Daejeon, KR;

Inventors:

Hyeon Min Bae, Seoul, KR;

Soon Won Kwon, Daejeon, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 7/30 (2006.01); H04L 25/03 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03891 (2013.01); H04L 25/03961 (2013.01); H04L 2025/03407 (2013.01);
Abstract

A variable-precision distributed arithmetic (VPDA) multi-input multi-output (MIMO) equalizer is presented to reduce the size and dynamic power of 112 Gbps dual-polarization quadrature phase-shift-keying (DP-QPSK) coherent optical communication receivers. The VPDA MIMO equalizer compensates for channel dispersion as well as various non-idealities of a time-interleaved successive approximation register (SAR) based analog-to-digital converter (ADC) simultaneously by using a least mean square (LMS) algorithm. As a result, area-hungry analog domain calibration circuits are not required. In addition, the VPDA MIMO equalizer achieves 45% dynamic power reduction over conventional finite impulse response (FIR) equalizers by utilizing the minimum required resolution for the equalization of each dispersed symbol.


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