The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2015

Filed:

Feb. 12, 2013
Applicant:

Samsung Display Co., Ltd., Yongin, Gyeonggi-Do, KR;

Inventors:

Se Hyoung Cho, Seoul, KR;

Sunhwa Lee, Andong-si, KR;

Meehye Jung, Suwon-si, KR;

Yeun Tae Kim, Suwon-si, KR;

Sunghwan Won, Seoul, KR;

Chongchul Chai, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/038 (2013.01); G09G 5/00 (2006.01); G09G 3/36 (2006.01); G02F 1/1333 (2006.01); G02F 1/1339 (2006.01); G02F 1/1362 (2006.01);
U.S. Cl.
CPC ...
G09G 3/36 (2013.01); G09G 3/3648 (2013.01); G09G 3/3677 (2013.01); G02F 1/133377 (2013.01); G02F 1/1339 (2013.01); G02F 1/136204 (2013.01); G02F 1/136209 (2013.01); G02F 2001/133388 (2013.01); G02F 2001/136222 (2013.01);
Abstract

A nano crystal display includes a display panel including a display area and a non-display area, a data driver which applies data voltages to pixels through data lines, a gate driver disposed in the non-display area and which sequentially applies gate signals to the pixels through gate lines in response to control signals, a control signal line part disposed in the non-display area and which applies the control signals to the gate driver, a cover layer which extends in a column direction and covers the gate driver and the control signal line part, and a sub-electrode which extends in the column direction and covers the cover layer. The pixels display gray scales corresponding to the data voltages provided through the data lines in response to the gate signals.


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