The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2015

Filed:

Nov. 15, 2012
Applicant:

Renesas Electronics Corporation, Kanagawa, JP;

Inventor:

Masazumi Matsuura, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 21/768 (2006.01); H01L 29/78 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01); H01L 21/76841 (2013.01); H01L 21/76898 (2013.01); H01L 23/564 (2013.01); H01L 29/78 (2013.01); H01L 2924/0002 (2013.01);
Abstract

To provide a technique adopting a TSV technique, capable of improving manufacturing yield and reliability of semiconductor devices. By partitioning a connection pad-forming region into a plurality of regions and by forming, respectively, connection padshaving a relatively small planar area, spaced apart from an adjacent connection padin each of partitioned regions, dishing generated in the connection padis lightened. In addition, by not forming a through holefor forming a through electrodein an interlayer insulating filmcovering a semiconductor element, intrusion of HO, a metal ion such as Naor K, etc. into an element-forming region from the through hole, via the interlayer insulating film is prevented.


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