The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2015

Filed:

Aug. 15, 2013
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Sarunya Bangsaruntip, Mount Kisco, NY (US);

Amlan Majumdar, White Plains, NY (US);

Jeffrey W. Sleight, Ridgefield, CT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 49/02 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 21/77 (2006.01); B82Y 40/00 (2011.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 21/77 (2013.01); B82Y 40/00 (2013.01); H01L 29/0669 (2013.01); Y10S 977/762 (2013.01); H01L 27/0629 (2013.01); H01L 28/40 (2013.01); H01L 21/84 (2013.01); H01L 27/1203 (2013.01);
Abstract

A method of fabricating an electronic device includes the following steps. At least one first set and at least one second set of nanowires and pads are etched in an SOI layer of an SOI wafer. A first gate stack is formed that surrounds at least a portion of each of the first set of nanowires that serves as a channel region of a capacitor device. A second gate stack is formed that surrounds at least a portion of each of the second set of nanowires that serves as a channel region of a FET device. Source and drain regions of the FET device are selectively doped. A first silicide is formed on the source and drain regions of the capacitor device that extends at least to an edge of the first gate stack. A second silicide is formed on the source and drain regions of the FET device.


Find Patent Forward Citations

Loading…