The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2015

Filed:

Feb. 10, 2011
Applicants:

Hajime Saitoh, Osaka, JP;

Naoki Makita, Osaka, JP;

Inventors:

Hajime Saitoh, Osaka, JP;

Naoki Makita, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 27/11 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1222 (2013.01); H01L 27/11 (2013.01); H01L 27/1108 (2013.01); H01L 27/1214 (2013.01);
Abstract

A purpose of the present invention is to reduce the driving voltage of a semiconductor device that includes an n-type TFT and a p-type TFT. Disclosed is a semiconductor device in which an n-channel type first thin film transistor () and a p-channel type second thin film transistor () are provided on the plane of a substrate (). A first semiconductor layer () of the first thin film transistor () has a main portion, which is sandwiched between the upper surface and the lower surface of the first semiconductor layer (), and an slanted portion, which is sandwiched by the side face and the lower surface of the first semiconductor layer (). A second semiconductor layer () has a main portion, which is sandwiched between the upper surface and the lower surface of the second semiconductor layer (), and a slanted portion, which is sandwiched between the side face and the lower surface of the second semiconductor layer (). The inclination angle of the side face of the second semiconductor layer () relative to the plane of the substrate () is larger than the inclination angle of the side face of the first semiconductor layer () relative to the plane of the substrate ().


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