The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2015

Filed:

Mar. 15, 2013
Applicant:

Samsung Display Co., Ltd., Yongin, KR;

Inventors:

Byoung-Keon Park, Yongin, KR;

Tae-Hoon Yang, Yongin, KR;

Jin-Wook Seo, Yongin, KR;

Soo-Beom Jo, Yongin, KR;

Dong-Hyun Lee, Yongin, KR;

Kil-Won Lee, Yongin, KR;

Maxim Lisachenko, Yongin, KR;

Yun-Mo Chung, Yongin, KR;

Bo-Kyung Choi, Yongin, KR;

Jong-Ryuk Park, Yongin, KR;

Ki-Yong Lee, Yongin, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/12 (2006.01); H01L 29/786 (2006.01); H01L 51/52 (2006.01); H01L 27/32 (2006.01);
U.S. Cl.
CPC ...
H01L 51/52 (2013.01); H01L 27/3265 (2013.01); H01L 2227/323 (2013.01);
Abstract

An organic light emitting diode (OLED) display device and a method of fabricating the same are provided. The OLED display device includes a substrate having a thin film transistor region and a capacitor region, a buffer layer disposed on the substrate, a gate insulating layer disposed on the substrate, a lower capacitor electrode disposed on the gate insulating layer in the capacitor region, an interlayer insulating layer disposed on the substrate, and an upper capacitor electrode disposed on the interlayer insulating layer and facing the lower capacitor electrode, wherein regions of each of the buffer layer, the gate insulating layer, the interlayer insulating layer, the lower capacitor electrode, and the upper capacitor electrode have surfaces in which protrusions having the same shape as grain boundaries of the semiconductor layer are formed. The resultant capacitor has an increased surface area, and therefore, an increased capacitance.


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