The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2015

Filed:

Jul. 06, 2011
Applicants:

Eun-sub Shim, Anyang-si, KR;

Jung-chak Ahn, Yongin-si, KR;

Bum-suk Kim, Hwaseong-si, KR;

Kyung-ho Lee, Bucheon-si, KR;

Inventors:

Eun-Sub Shim, Anyang-si, KR;

Jung-Chak Ahn, Yongin-si, KR;

Bum-Suk Kim, Hwaseong-si, KR;

Kyung-Ho Lee, Bucheon-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0232 (2014.01); H01L 27/146 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1464 (2013.01); H01L 27/14625 (2013.01); H01L 27/14685 (2013.01); H01L 27/14687 (2013.01);
Abstract

A method of manufacturing a backside illuminated image sensor, including forming a first isolation layer in a first semiconductor layer, such that the first isolation layer defines pixels of a pixel array in the first semiconductor layer, forming a second semiconductor layer on a first surface of the first semiconductor layer, forming a second isolation layer in the second semiconductor layer, such that the second isolation layer defines active device regions in the second semiconductor layer, forming photo detectors and circuit devices by implanting impurities into a first surface of the second semiconductor layer, the first surface of the second semiconductor layer facing away from the first semiconductor layer, forming a wiring layer on the first surface of the second semiconductor layer, and forming a light filter layer on a second surface of the first semiconductor layer.


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