The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2015

Filed:

May. 21, 2013
Applicant:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Inventors:

Shadi M. Barakat, Foster City, CA (US);

Bhuvanachandran K. Nair, Fremont, CA (US);

Paul-Hugo Lamarche, San Jose, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01); G01R 31/28 (2006.01); G06F 11/00 (2006.01); H04L 7/00 (2006.01); H04L 1/12 (2006.01); H04L 1/24 (2006.01); H04L 25/14 (2006.01); G11C 29/02 (2006.01); H04L 7/033 (2006.01); H04L 7/10 (2006.01);
U.S. Cl.
CPC ...
H04L 1/12 (2013.01); H04L 1/243 (2013.01); H04L 7/033 (2013.01); H04L 7/10 (2013.01); H04L 25/14 (2013.01); G11C 2211/4061 (2013.01); G11C 29/022 (2013.01); G11C 29/023 (2013.01); G11C 29/028 (2013.01);
Abstract

A multi-link input/output (I/O) interface uses both feed-forward and feedback signaling to reduce the impact of noise on data capture at a memory controller. To transfer data from a source module to a destination module, a defined pattern is communicated from the memory module along a master channel concurrent with the memory module providing data via one or more slave channels. Based on the phase of the defined pattern as it is received, the multi-link I/O interface feeds forward to the slave channels control signaling whose phase reflects a predicted noise pattern for the system. Each slave channel performs CDR by adjusting timing of its corresponding capture clock signal based on the fed forward control signaling and based on feedback signaling for the corresponding slave channel, whereby the feedback signaling reflects an error measurement between a phase of a capture clock signal and transitions in received data.


Find Patent Forward Citations

Loading…