The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2015

Filed:

Apr. 19, 2010
Applicants:

David Martini, San Giovanni Valdarno, IT;

Massimo Valiani, Corciano, IT;

Simone Soldani, Levane, IT;

Inventors:

David Martini, San Giovanni Valdarno, IT;

Massimo Valiani, Corciano, IT;

Simone Soldani, Levane, IT;

Assignee:

Power-One Italy S.p.A., Terranuova Bracciolini, IT;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 7/5387 (2007.01); H02M 7/00 (2006.01); H02M 7/483 (2007.01); H02M 7/49 (2007.01);
U.S. Cl.
CPC ...
H02M 7/483 (2013.01); H02M 7/49 (2013.01);
Abstract

The multi-level DC/AC converter, comprising: an input () connectable to a direct voltage source (), with a first connection () and a second connection () between which can be applied an input voltage (Vi); a half-bridge with a first controlled switch () and a second controlled switch () between which is positioned an output (U) of the converter; a first connecting branch () between the first controlled switch () and the first connection () and a second connecting branch () between the second controlled switch () and the second connection (); a third controlled switch () associated to the first controlled switch (), connectable in series to the first controlled switch to generate an output voltage exceeding a first limit value (Vi/2); a fourth controlled switch () associated to the second controlled switch (), connectable in series to said second controlled switch to generate an output voltage below a second limit value (−Vi/2).


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