The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2015

Filed:

Jun. 07, 2013
Applicant:

Abb Research Ltd, Zürich, CH;

Inventors:

Gerardo Escobar, Merida, MX;

Sami Pettersson, Wettingen, CH;

Ngai-Man Ho, Fislisbach, CH;

Assignee:

ABB Research Ltd, Zürich, CH;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 7/537 (2006.01); H02M 7/42 (2006.01); H02M 7/487 (2007.01); H02M 1/12 (2006.01); H02J 3/38 (2006.01);
U.S. Cl.
CPC ...
H02M 7/42 (2013.01); H02M 1/126 (2013.01); H02J 3/383 (2013.01); H02M 7/487 (2013.01); H02M 2001/123 (2013.01); Y02E 10/563 (2013.01);
Abstract

An exemplary method and an apparatus implementing the method for an arrangement having a three-phase, multi-level inverter, an output LCL-filter connecting the inverter to a grid, and a virtual-ground connection between the LCL-filter and the neutral point of the DC-link. The method includes determining a zero-sequence component of an LCL-filter inverter-side current, calculating a zero-sequence damping and balancing voltage term based on the LCL-filter inverter-side current zero-sequence component and voltages over the two halves of the DC-link, and adding the zero-sequence damping and voltage balancing term to the output voltage reference.


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