The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2015

Filed:

Feb. 26, 2014
Applicant:

Shintaro Kawamura, Kanagawa, JP;

Inventor:

Shintaro Kawamura, Kanagawa, JP;

Assignee:

Ricoh Company, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B41J 2/435 (2006.01); H03K 3/00 (2006.01); H03K 21/02 (2006.01); H03K 5/15 (2006.01);
U.S. Cl.
CPC ...
H03K 21/02 (2013.01); H03K 5/1502 (2013.01);
Abstract

A clock signal generating circuit that generates a clock signal, the clock signal generating circuit including a clock signal generator configured to generate a reference clock signal; and a plurality of dividers to which the reference clock signal is to be input. A division ratio of at least one of the plurality of dividers varies based on division ratio data that defines the division ratio of the at least one of the plurality of dividers. The division ratio data represents a value that fluctuates around reference division ratio data with respect to time.


Find Patent Forward Citations

Kawamura, Shintaro. (2015). Clock signal generating circuit, image forming apparatus, and clock signal generating method of clock signal generating circuit (U.S. Patent No. 9030518). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9030518

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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