The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2015

Filed:

Mar. 22, 2011
Applicants:

Yoshiko Kato, Yokohama, JP;

Hidenobu Nagashima, Yokkaichi, JP;

Inventors:

Yoshiko Kato, Yokohama, JP;

Hidenobu Nagashima, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); G11C 16/04 (2006.01); G11C 5/06 (2006.01); H01L 27/02 (2006.01); H01L 27/115 (2006.01);
U.S. Cl.
CPC ...
G11C 16/0483 (2013.01); G11C 5/063 (2013.01); H01L 27/0207 (2013.01); H01L 27/11519 (2013.01); H01L 27/11524 (2013.01); H01L 2924/0002 (2013.01);
Abstract

In one embodiment, a semiconductor memory device includes a substrate, and device regions formed in the substrate to extend in a first direction which is parallel to a principal plane of the substrate. The device further includes select gates disposed on the substrate to extend in a second direction which is perpendicular to the first direction, and a contact region provided between the select gates on the substrate and including contact plugs disposed on the respective device regions. Further, the contact region includes partial regions, in each of which N contact plugs are disposed on N successive device regions to be arranged on a straight line being non-parallel to the first and second directions, where N is an integer of 2 or more. Further, the contact region includes the partial regions of at least two types whose values of N are different.


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