The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 12, 2015
Filed:
Jan. 04, 2013
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Assignee:
Texas Instruments Incorporated, Dallas, TX (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49568 (2013.01); H01L 2924/1306 (2013.01); H01L 23/3107 (2013.01); H01L 23/49537 (2013.01); H01L 24/06 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 24/81 (2013.01); H01L 24/83 (2013.01); H01L 24/97 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04026 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16245 (2013.01); H01L 2224/291 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/33181 (2013.01); H01L 2224/8121 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/83192 (2013.01); H01L 2224/8321 (2013.01); H01L 2224/83815 (2013.01); H01L 2924/14 (2013.01); H01L 23/49575 (2013.01); H01L 23/49531 (2013.01); H01L 23/49589 (2013.01);
Abstract
An integrated circuit (IC) package including a bottom leadframe, an interposer mounted on the bottom leadframe, a flipchip die mounted on the interposer and a top leadframe electrically connected to the interposer. Also, a method of making an integrated circuit (IC) package including electrically and physically attaching a die to an interposer, attaching the interposer to a bottom leadframe, attaching a discrete circuit component to the interposer and attaching a top leadframe to the bottom leadframe.