The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2015

Filed:

Oct. 30, 2013
Applicant:

Sandia Corporation, Albuquerque, NM (US);

Inventors:

Anna Tauke-Pedretti, Albuquerque, NM (US);

Gregory N. Nielson, Albuquerque, NM (US);

Jeffrey G. Cederberg, Albuquerque, NM (US);

Jose Luis Cruz-Campa, Albuquerque, NM (US);

Assignee:

Sandia Corporation, Albuquerque, NM (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/46 (2006.01); H01L 31/0735 (2012.01); H01L 31/18 (2006.01);
U.S. Cl.
CPC ...
H01L 31/18 (2013.01); H01L 31/0735 (2013.01); H01L 31/1852 (2013.01); H01L 31/1892 (2013.01); Y02E 10/52 (2013.01); Y02E 10/544 (2013.01);
Abstract

A method includes etching a release layer that is coupled between a plurality of semiconductor devices and a substrate with an etch. The etching includes etching the release layer between the semiconductor devices and the substrate until the semiconductor devices are at least substantially released from the substrate. The etching also includes etching a protuberance in the release layer between each of the semiconductor devices and the substrate. The etch is stopped while the protuberances remain between each of the semiconductor devices and the substrate. The method also includes separating the semiconductor devices from the substrate. Other methods and apparatus are also disclosed.


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